Agent skill · software engineering · nvidia
jetson-customize-usb
Enable/disable Jetson USB2/USB3 SS ports via kernel-DT overlay. Do NOT use for UPHY lane allocation or ODMDATA edits.
Why this skill is useful
Adds a comprehensive kernel-DT overlay script for managing USB port configurations on Jetson devices, which is not available in public documentation.
What it needs
Requires dtc, fdtoverlay installed locally. About 5k tokens when loaded. Last updated 2026-08-07. 2,816 stars on the source repository.
What this skill does
Customize USB (per-port enable / disable / role) Purpose Enable, disable, or change the role of USB2 / USB3 SS ports on a Jetson Thor (Tegra264) or Orin (Tegra234) custom carrier. Captures per-port wiring (role, max speed, VBUS-EN / OC GPIOs, CC1/CC2 GPIOs for Type-C, USB3 SS UPHY lane), resolves the SS to USB2 companion graph from the in-tree DTB, then renders a self-contained kernel-DT overlay that flips every port action in three places in lockstep (lane status, port status, host xHCI phys + phy-names). UPHY lane allocation belongs to jetson-customize-uphy. No ODMDATA edit. Output is one commit to the composite custom overlay .dts in the bspsources/ hardware repo. Prerequisites Active profile with referencedevkit: + customcarrier: blocks. <source.rootpath>/LinuxforTegra/.git exists (/jetson-init-source). /jetson-derive-carrier has run — carrier flash-conf fork in the overlay tracker. /jetson-customize-uphy has run when any enabled USB3 SS port needs a non-stock UPHY lane allocation. Its JSON sidecar at <workspace>/target-platform/<profile-stem>.jetson-customize-uphy.json is consulted for SS lane allocation. Source-of-truth docs: Adaptation Guide §"Port the Universal Serial Bus", Module Design Guide §USB, SoC TRM (xusb block). When customcarrier: is present, both documents.customcarrierschematic AND documents.customcarrierpinmuxxls are REQUIRED. Refuse the run if either is missing — per-port routing (VBUS-EN / OC / CC GPIOs, SS lane wiring, hub fan-out) on a custom carrier cannot be guessed. Reference-devkit-only profiles skip this check. dtc, fdtoverlay on PATH. Overview USB on Tegra spans three IP surfaces: the xusbpadctl block (USB2 OTG + USB3 SS PHYs), the tegra-xusb xHCI host controller, and an optional tegra-xudc device controller attached to the single OTG-capable USB2 port (usb2-0). A per-port flip MUST touch three kernel-DT places in lockstep. …
How to use it
Reference it in AdaL, Claude Code, Cursor or any coding agent — nothing to install:
@skills nvidia/jetson-customize-usb